{R : Type u_1} →
  {A : Type u_2} →
    {B : Type u_3} →
      {ι : Type u_4} →
        [inst : CommSemiring R] →
          [inst_1 : Semiring A] →
            [inst_2 : Semiring B] →
              [inst_3 : Algebra R A] →
                [inst_4 : Algebra R B] →
                  [inst_5 : DecidableEq ι] →
                    [inst_6 : AddMonoid ι] →
                      {𝒜 : ι → Submodule R A} →
                        {ℬ : ι → Submodule R B} →
                          [inst_7 : GradedAlgebra 𝒜] →
                            [inst_8 : GradedAlgebra ℬ] →
                              {motive : (𝒜 →ₐᵍ[R] ℬ) → Sort u} →
                                ((toAlgHom : A →ₐ[R] B) →
                                    (map_mem : ∀ {i : ι} {x : A}, x ∈ 𝒜 i → toAlgHom.toRingHom x ∈ ℬ i) →
                                      motive { toAlgHom := toAlgHom, map_mem := map_mem }) →
                                  (t : 𝒜 →ₐᵍ[R] ℬ) → motive t